June 2010 - Page 2 of 3 - Semiconductor Engineering

The Tide Is Turning
By Jon McDonald - 24 Jun, 2010 - Comments: 0

By Jon McDonald I was at DAC last week. Over the course of the week I had a chance to talk with a significant number of customers and others in the industry. As has been the case the past few years there was good interest in system-level design. But from my perspective the tone of the discussions experienced a major shift this year. In the past, much of the discussion was around “why—wh... » read more

Experts At The Table: Nice To Have Vs. Need To Have
By Ed Sperling - 18 Jun, 2010 - Comments: 0

Low-Power Engineering sat down to discuss what’s essential and what isn’t in EDA with Brani Buric, executive vice president at Virage Logic; Kalar Rajendiran, senior director of marketing at eSilicon; Mike Gianfagna, vice president of marketing at Atrenta, and Oz Levia, vice president of marketing and business development at Springsoft. What follows are excerpts of that conversation. LPE... » read more

SoC Physical Closure Begins At RTL
By Various Writers - 16 Jun, 2010 - Comments: 0

Any survey of chip design teams consistently points to two problem areas impacting quality and schedule of today's SoCs. Those areas are: a) completeness of verification, and b) physical design closure for area, timing and power for complex IP's and SoC's. With the advent of deep sub-micron technology, these problem areas have become exacerbated. In this White Paper, we take a closer look at th... » read more

The Road To DAC: One-On-One With Aart de Geus
By Ed Sperling - 11 Jun, 2010 - Comments: 0

Synopsys CEO Aart De Geus sounds off about the future of design and where growth will come from in the EDA market.   [youtube vid=GO-9ILL9fDg] » read more

Experts At The Table: Nice To Have Vs. Need To Have
By Ed Sperling - 10 Jun, 2010 - Comments: 0

Low-Power Engineering sat down to discuss what’s essential and what isn’t in EDA with Brani Buric, executive vice president at Virage Logic; Kalar Rajendiran, senior director of marketing at eSilicon; Mike Gianfagna, vice president of marketing at Atrenta, and Oz Levia, vice president of marketing and business development at Springsoft. What follows are excerpts of that conversation. LPE... » read more

The Power Of The Customer Experience
By Barry Pangrle - 10 Jun, 2010 - Comments: 0

By Barry Pangrle Consumers of electronics don’t buy chips, they buy products or gadgets. Sure the geeks among us may know about “the chip” in a PC, typically in reference to the CPU or maybe even the GPU. But there are many chips in the product and you’d have to be an über-geek to know all of them. How many customers actually know the primary SoC in their smart phone? The point is ... » read more

Is Asynchronous Technology Ready For Prime Time?
By Ed Sperling - 10 Jun, 2010 - Comments: 0

By Ann Steffora Mutschler As the quest grows to manage power in everything from the handheld smart phone to sensors for automotive applications and contactless payment cards, designers are getting hungry for new design techniques that allow them to hit yield targets within their power budgets. One such design technique is decidedly not new. In fact, the concept of asynchronous techno... » read more

Special Report: Using FPGAs For 3D Stacking
By Ed Sperling - 10 Jun, 2010 - Comments: 0

By Ed Sperling Xilinx is developing a 3D architecture for its FPGAs and Actel has been approached by SoC makers to use its flash-based FPGA as a layer in a 3D IC stack. Both approaches could radically alter the fundamental equation about the tradeoffs between FPGAs and ASICs—particularly the power and performance overhead normally associated with programmable logic. Xilinx declined to com... » read more

Power Or Performance?
By Ed Sperling - 10 Jun, 2010 - Comments: 0

By Pallab Chatterjee Most microprocessors have shifted to new small geometry processes in order to be the most efficient at power and high performance. However there is always a trade-off between power, performance and area (PPA) for semiconductors, and this is especially relevant for processors. In the current design space, processors are created as general-purpose products, but they are gene... » read more

Synopsys To Buy Virage Logic
By Ed Sperling - 10 Jun, 2010 - Comments: 0

By Ed Sperling Synopsys bought Virage Logic today for $289 million, extending its IP portfolio well beyond just standard I/O and PHY into memory, logic and processor cores. The move strengthens Synopsys’ position as an all-in-one powerhouse with IP that can fit into an integrated flow. “A big part of the value is providing building blocks that work through the SoC flow,” said Joac... » read more

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