July 2010 - Page 2 of 3 - Semiconductor Engineering

Smarter Video Chips, Smarter Business Model
By Ed Sperling - 21 Jul, 2010 - Comments: 0

Pixim's CEO talks about what the company outsources, what it keeps internal, and how it differentiates from the competition. [youtube vid=jDoaQ91QM3c] » read more

Experts At The Table: The Power Problem
By Ed Sperling - 16 Jul, 2010 - Comments: 0

Low-Power Engineering sat down to discuss the issues in low-power design with Vic Kulkarni, general manager and senior vice president of the RTL business unit, Apache Design Solutions; Pete Hardee, solutions marketing manager at Cadence; Bernard Murphy, chief technology officer at Atrenta, and Bhavna Agrawal, manager of circuit design automation at IBM. What follows are excerpts of that convers... » read more

The Changing Supply Chain
By Various Writers - 14 Jul, 2010 - Comments: 0

By Kalar Rajendiran In efforts to improve product quality AND cut development and production costs while decreasing time to market, fabless semiconductor companies (FSCs) and OEMs have outsourced functions that didn’t add value to their products and to the company’s bottom line. Over the past 20+ years, they’ve outsourced EDA tools, test and packaging, IP core development and of course... » read more

The Power Of Standards
By Barry Pangrle - 08 Jul, 2010 - Comments: 0

By Barry Pangrle It’s often said that the wonderful thing about standards is that there are so many to choose from. As an industry, EDA seems to have a short memory as VMM and OVM (now becoming UVM), VHDL and Verilog, and more recently UPF and CPF. In cases where one standard suffices, it is horribly inefficient to create multiple “standards.” It is a waste of effort and resources for ED... » read more

Why Low-Power Analog Solutions Are Lacking
By Luke Lang - 08 Jul, 2010 - Comments: 0

By Luke Lang The need for low-power design has been well documented. The demand for low-power design solutions is at an all-time high. Just take a quick glance through the 2010 Design Automation Conference advanced program, and you’ll see that the word “low-power” appears repeatedly. These are exciting times for anyone associated with low-power design. Recent developments in low-power... » read more

Mobile Gaming: The Next Power-Saving Frontier
By Ed Sperling - 08 Jul, 2010 - Comments: 0

By Pallab Chatterjee Mobile and handheld gaming platforms are gaining lots of attention these days, and from a low-power engineering standpoint it poses a challenge that dwarfs any game played on the devices. Unlike mobile phones, these handheld platforms don’t have the luxury of trading off between multiple operating modes to extend battery life. Even worse, they have to perform at the ... » read more

Getting Low-Power IP Integration Right
By Ed Sperling - 08 Jul, 2010 - Comments: 0

By Ann Steffora Mutschler When it comes to integrating multivendor IP, power concerns dominate the challenges that engineers face. To get it right however, there are definitely questions that should be asked when considering which IP to use, along with techniques to manage power complexity. When choosing IP, the following points should be considered: How mature is the IP being sold? Has... » read more

The Power Of IP
By Ed Sperling - 08 Jul, 2010 - Comments: 0

By Ann Steffora Mutschler As the number of design starts goes down the corresponding complexity of SoCs has gone up—and continues to grow. Everyone is looking at the value they can bring to the table as increasing proportions of SoCs are either reused from pre-existing IP within the company designing the chip or brought in from outside. Because is economically impractical to start an SoC... » read more

EUV Focus Shifts To Affordability
By Ed Sperling - 08 Jul, 2010 - Comments: 0

By David Lammers Over the past year, key technologists in the semiconductor industry have come around to believing that EUV lithography will be available for critical mask layers in the next three to five years. What is still up for debate is whether EUV will be cost-effective for low-power consumer SoCs. To penetrate that cost-sensitive market, EUV must overcoming hurdles presented by masks, ... » read more

Keeping Models In Sync
By Ed Sperling - 08 Jul, 2010 - Comments: 0

By Ed Sperling Models and higher levels of abstraction have been hailed as the best choice for developing SoCs at advanced process nodes, but at 28nm and beyond even that approach is showing signs of stress. The number of models needed for a complex SoC has been growing at each new process node, which makes it much more difficult to keep them updated and in sync as the design progresses down t... » read more

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