October 2011 - Page 2 of 4 - Semiconductor Engineering


Collaboration Grows


By Ed Sperling A series of recent announcements by the Big Three EDA vendors and their well-known partners from across the disaggregated SoC ecosystem is lending new credence to the impact of collaboration. While IDMs such as Apple, Intel, Samsung and IBM continue to blaze their own trail, developing in-house tools, methodologies, processes and chips, fabless companies working with foundrie... » read more

A Message From Steve Jobs


By Kurt Shuler “I wanted my kids to know me. I wasn’t always there for them, and I wanted them to know why and to understand what I did.” This is how Steve Jobs answered his biographer when asked why he agreed to cooperate in the writing of his biography. Jobs’ statement was a kick in the gut when I first read it, and still elicits a gnawing pain in me. It drove home the point th... » read more

New Terms, New Problems


At the distant forefront of research there is very little marketing. After all, what’s the point? Until recently, much of this stuff was theoretical physics, and products weren’t even a consideration. It wasn’t until the past decade when we could actually see atoms. We had to theorize them. And it wasn’t until the past few years when we actually began taking stacked die seriously. Bu... » read more

eDRAM: No Brainer…But No Takers?


By Steve Hamilton Designers in the consumer electronics market—mobile in particular—are constantly looking for new ways to reduce cost and power while increasing performance. This is far from novel. With consumers’ unrelenting demand for more features at lower prices, you would think semiconductor companies would jump when confronted with a technology that gives them a real competitive e... » read more

Understanding Formal Verification Concepts, Part 3


This final white paper in a three-part series about formal verification concepts examines the assertion-based verification flow and some of the formal verification algorithms. To download the first two papers in this series, click here for part one and here for part two. This kind of approach has become necessary as SoC designs become more challenging and the traditional method of simulat... » read more

Revelations From Italy


By Jon McDonald I am just back from vacation. My wife and I spent two weeks in Italy. While there we toured the Tuscan countryside, Florence and Rome. We had a rental car for the time in Tuscany. In Rome we didn’t keep the car. Watching the different types of cars and the way they were driven gave me a good analogy for an issue I’ve had a number of discussions on. As people think about ... » read more

Putting Kurzweil’s Singularity To The Mobile Test


I have been fascinated by Ray Kurzweil’s book "The Singularity is Near"for a while (great book, the documentary “Transcendent Man” gives a great summary, and apparently a movie is coming up too). Bottom line Kurzweil is charting the accelerating rate of technology change. That chart hits the x-axis in 2045 and that’s the singularity as it is unclear what happens then. Do we have to adap... » read more

Experts At The Table: Mobile Design Challenges


By Ed Sperling Low-Power Engineering sat down to discuss the increasing challenges of designing for mobile devices with Qi Wang, technical marketing group director at Cadence; Cary Chin, director of technical marketing for low-power solutions at Synopsys; Bernard Murphy, CTO of Atrenta; and Dave Reed, senior director of marketing at SpringSoft. What follows are excerpts of that conversation. ... » read more

It’s hard to stay on top


As part of my fascination with the history of the semiconductor industry, I’ve recently been reviewing data on the annual top 20 semiconductor companies since 1987. Using revenue data compiled by Gartner Dataquest (through 1999) and iSupply (2000 – 2010), it’s been very interesting to see what changes have come about at the top of the heap in our industry. Here is a brief synopsis of so... » read more

Non-visual defect inspection gives fabs better eyes, new insights


For a long time, semiconductor defect inspection focused on particles, and particle defects remain an important cause of yield loss. But as devices have become more complex, additional kinds of defects have drawn the attention of process engineers. Bridging, pattern collapse, and other resist defects have become particularly important in the sub-100 nm era. The introduction of CMP brought abras... » read more

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