June 2012 - Page 2 of 6 - Semiconductor Engineering


All Indicators Point North


Designing and producing chips has always been difficult, but the number of things that conspire to make it harder at 20nm is the longest in the history of the semiconductor industry. The list will grow longer still at 14nm and beyond, not to mention so expensive that one mistake will kill a company. While system engineers and architects look at the challenges on the front end, the problems ... » read more

High Speed PCB Layout: Physical Design Issues Of Highspeed Interfaces


Moore’s law, applied to data rates, has pushed PCB circuits so fast that the layout becomes part of the circuit. In designs such as DDR3 and PCIe, the fastest memory and high-speed serial performance comes with very specific physical layout requirements that are not obvious. Unless you are thinking like an RF designer, there are many unexpected challenges to a successful high-speed layout. A ... » read more

Technical Considerations For Implementing USB 3.0 On SoCs


The Universal Serial Bus (USB) protocol has been the standard way to connect computers to external devices for nearly two decades. The protocol continues to evolve to support the growing demands of consumer devices. With its simplicity of use, USB is the number one choice of connectivity protocols in the consumer world. USB 3.0 early adoption began in 2010. Now, key USB software and systems pro... » read more

PSL/SVA Assertions In SPICE


Assertion-based verification is a key aspect of any complete SoC or Silicon Realization flow. In this paper, we discuss how PSL (Property Specification Language)/SVA (System-V erilog Assertions) assertion semantics are extended for the first time to SPICE (Simulation Program with Integrated Circuit Emphasis)-level netlists and evaluated within a SPICE simulator, and present multiple examples an... » read more

Manufacturing & MEMS


By Joanne Itow There’s been a lot of attention focused on MEMS in the past couple of years, and rightfully so. In 2011 when total semiconductor revenues grew by only 1.3%, MEMS revenues grew by more than 34%. MEMS have been activating air bags in our cars and projecting images on DLP screens for years, but it wasn’t until the accelerometer in smartphones when mainstream semiconductor manuf... » read more

Experts At The Table: IP Subsystems


By Ed Sperling Semiconductor Manufacturing & Design sat down to discuss the transition to IP subsystems with Kevin Meyer, vice president of design enablement strategy and alliances at GlobalFoundries; Steve Roddy, vice president of marketing at Tensilica; Mike Gianfagna, vice president of marketing at Atrenta; and Adam Kablanian, CEO of Memoir Systems. What follows are excerpts of that con... » read more

Experts At The Table: Multipatterning


By Ed Sperling Semiconductor Manufacturing & Design sat down with Michael White, physical verification product line manager at Mentor Graphics; Luigi Capodieci, R&D fellow at GlobalFoundries; Lars Liebmann, IBM distinguished engineer; Rob Aitken, ARM fellow; Jean-Pierre Geronimi, CAD director at STMicroelectronics; and Kuang-Kuo Lin, director of foundry design enablement at Samsung Ele... » read more

The New Mobility Era


By Kathryn Ta Transistors are the fundamental building blocks out of which all modern electronic devices are built. Invented in the early 1950s, transistors are the semiconductor switches that control and amplify electronic signals. As demand has grown over the years for greater performance from these devices, chipmakers have responded by packing wafers with twice as many of the transistors th... » read more

The Ins And Outs Of Directed Self-Assembly


By Mark LaPedus H.S. Phillip Wong, professor of electrical engineering at Stanford University and one of the leading experts on directed self-assembly (DSA) technology, sat down to discuss the future of this approach with Semiconductor Manufacturing & Design. With funding from the Semiconductor Research Corp. (SRC), Stanford is exploring contact-hole patterning and the design infrastructur... » read more

CNSE Readying NFX Fab for G450C, EUV Efforts


By David Lammers Two key areas of the semiconductor industry’s future—the 450mm wafer transition and EUV lithography—are the focus of the new NFX (NanoFab Xtension) building now under construction at the College of Nanoscale Science and Engineering (CNSE) of the University at Albany. [caption id="attachment_6322" align="alignright" width="120" caption="Alain Kaloyeros"][/caption] T... » read more

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