October 2012


Experts At The Table: Issues In Lithography


By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss future lithography challenges with Juan Rey, senior director of engineering at Mentor Graphics; Aki Fujimura, chairman and chief executive at D2S; and Tatsuo Enami, general manager for the sales division at Gigaphoton. What follows are excerpts of that conversation. (Part one can be found here.) SMD: Let’s re-vi... » read more

Experts At The Table: The Business Of IP


By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss IP supply chain issues with Jim Hogan, an independent VC; Jack Brown, senior vice president at Sonics; Mike Gianfagna, vice president of marketing at Atrenta; Paul Hollingworth, vice president of strategic accounts at eSilicon, and Warren Savage, CEO of IPextreme. What follows are excerpts of that conversation. LPHP:... » read more

The Essential Tool Kit


By Ann Steffora Mutschler Is there an essential chip design tool kit today that has only the ‘must haves?’ Sure, this sounds like a straightforward question, but the answer really depends on what process node the design will be manufacturing on. According to Jon McDonald, technical marketing engineer for the design and creation business at Mentor Graphics, there’s actually nothi... » read more

The New Mixed-Signal Flow


By Ann Steffora Mutschler We are on the cusp of the mixed-signal era. Traditional mixed-signal design environments, in which analog and digital parts are implemented separately, no longer are sufficient. They lead to excess iteration and prolonged design cycle time. Today’s mixed-signal designs require a new approach that enables design teams to be as efficient as possible productivity... » read more

The Growing Confidence Gap In Verification


By Ed Sperling It’s no surprise that verification is getting more difficult at each new process node. What’s less obvious is just how deep into organizations the job of verifying SoCs and ASICs now extends. Functional verification used to be a well-defined job at the back end of the design flow. It has evolved into a multi-dimensional, multi-group challenge, beginning at the earliest st... » read more

Calculating Emulation’s Complex Cost Of Ownership


By Ann Steffora Mutschler Hardware emulation or hardware-assisted verification –whichever term you choose—has been around for decades. But until recently it has seen only modest adoption due to the high cost, long set-up time, power and IT requirements, among other things. But with simulation running out of steam between 50 and 100 million gates, this specialized hardware makes a ... » read more

Quantum Shifts


By Ed Sperling Intel, STMicroelectronics and some of the leading memory providers already are working on 10nm process technology, and advanced researchers in universities and industry-leading companies are looking at 7nm, 5nm and even beyond. Those who have glimpsed this technological future have similar observations. There is no single technology problem that has to be solved at these node... » read more

Making Important Choices


By Nithya Ruff Last year, my daughter was a senior in high school, very busy finalizing her college selections and completing college applications. For anyone who has gone through this recently, it is not a trivial task to select a place where you will spend the next four years, a place that will shape your future and where you will be spending a good amount of your parent’s money. This expe... » read more

Putting The “Heterogeneous” In The HSA Foundation


By Kurt Shuler In last month’s article I explained why symmetric multiprocessing (SMP) architectures have been popular in PC and server markets, and why heterogeneous or asymmetric multiprocessing (AMP) has been the norm in mobility and consumer electronics markets. I also explained the trends that are leading PC and server markets to adopt heterogeneous architectures and introduced the HSA ... » read more

Tech Talk: Faster But Less Accurate


Semiconductor Engineering talks with professor Jan Rabaey of the University of California at Berkeley about new design approaches that could significantly boost performance and simplify design and verification—for some applications. [youtube vid=hAk1xA56h_A] » read more

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