June 2014 - Page 2 of 11 - Semiconductor Engineering

Where Do We Stand With CDC?
By Ann Mutschler - 26 Jun, 2014 - Comments: 1

Semiconductor Engineering sat down to discuss where the industry stands on clock domain crossing with Charlie Janac, CEO of Arteris; Shaker Sarwary, VP of Formal Verification Products at Atrenta; Pranav Ashar, CTO at Real Intent; and Namit Gupta, CAE, Verification Group at Synopsys. What follows are excerpts of that conversation. SE: While not a new aspect of design, clock domain crossing is... » read more

Linux And The Big Bad Wolf
By Achim Nohl - 26 Jun, 2014 - Comments: 0

With great interest, I am following any news around the progress of Linaro and the Linux kernel community with regard to addressing all the requirements for an ARMv8 64-bit server software stack. Well-established standards, such as the Unified Extensible Firmware Interface (UEFI) and Advanced Configuration and Power Interface (ACPI), are impacting the development direction of the community b... » read more

3 Challenges Of Delivering Configurable Semiconductor IP
By Kurt Shuler - 26 Jun, 2014 - Comments: 0

Over time, commercial IP products have morphed from single function blocks to 100% configurable IPs where no two instances are the same. In this article I point out the challenges of creating configurable IP, and the best-known practices to address them. IP Configurability Spectrum Throughout the history of chip design, there has been a spectrum of configurability that has been built into i... » read more

Semiconductor Self-Service: The Next Wave
By Mike Gianfagna - 26 Jun, 2014 - Comments: 0

The Internet is a marvelous invention. We all know it can bring a universe of human knowledge to our desktop. Thanks to some clever technology produced by some very successful companies, you also can browse all this information in real time, learning and discovering all the way. This ability to learn and discover is particularly interesting from a business perspective. It has created a truly... » read more

Game Of Eco Systems
By Frank Schirrmeister - 26 Jun, 2014 - Comments: 0

My first ever blog post on May 28, 2008, was called “May you live in interesting times …”, starting with “the view from the top” at Synopsys. At the time, my focus was abstraction levels and how the industry has been moving upwards for decades. While it is not a Chinese proverb after all (read my blog above), we still do live in interesting times, perhaps more so that ever. One of the... » read more

Semiconductor R&D Crisis Ahead?
By Ed Sperling - 26 Jun, 2014 - Comments: 0

Listen to engineering management at chipmakers these days and a consistent theme emerges: They’re all petrified about where to place their next technology bets. Do they move to 14/16nm finFETs with plans to shrink to 10nm, 7nm and maybe even 5nm? Do they invest in 2.5D and 3D stacked die? Or do they eke more from existing process nodes using new process technologies, more compact designs and ... » read more

Programming Is Not Patentable
By Brian Bailey - 26 Jun, 2014 - Comments: 1

I have written about problems with the [getkc id="16" kc_name="patent"] systems several times in the past and have also talked about a very important case that has been making its way through the courts. This one case, Alice Corp versus CLS, has been particularly closely followed because of the importance of its conclusion on software patents. On June 19 the Supreme Court came to its conclusion... » read more

Which Group Should Create System Models?
By Jon McDonald - 26 Jun, 2014 - Comments: 0

One of the factors affecting adoption of a system-level flow is identifying who will do the work to create the system model. For most organizations it's not something they have allocated to a specific group. Generally when an ESL flow is deployed, the software developers, architects and hardware designers will all benefit from the investment, so it would be reasonable that they all contribut... » read more

Without Moore’s Law: EDA
By Brian Bailey - 26 Jun, 2014 - Comments: 3

Semiconductor Engineering is examining the assertion about the end of Moore’s Law in a number of different ways. The special report, “Will 7nm and 5nm really happen?” looked at the technical aspects related to continuing into finer geometries. “Moore’s Law Tail No Longer Wagging the Dog” asked the question about the economics of people being able to afford to go to the latest node. ... » read more

Efficient Noise Analysis For Complex Non-Periodic Analog/RF Blocks
By Mentor, a Siemens Business - 25 Jun, 2014 - Comments: 0

Noise minimization is a required design objective for advanced analog and RF circuits. Unlike digital circuits, where noise is a second-order effect, noise in analog and RF circuits directly affects system performance metrics such as signal to noise ratio (SNR) and bit error rate (BER). Effective design optimization in the presence of random device noise is challenging because the noise sources... » read more

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