July 2014 - Page 2 of 11 - Semiconductor Engineering

DAC Is Starting To Heat Up
By Anne Cirkel - 25 Jul, 2014 - Comments: 0

As we reach the midpoint of summer, it’s time to kick back and enjoy vacation and the sunshine. But don’t get too relaxed, because paper submissions are just around the corner. Turning up the temperature on paper submissions Last week I introduced you to DAC’s two technical program co-chairs Sharon Hu and Rob Aitken. They lead our technical program committee, a world-wide volunteer n... » read more

Apple CarPlay Vs. Android Auto
By Kurt Shuler - 25 Jul, 2014 - Comments: 1

The smartphone wars have been fought and won (well, at least for now), but now there’s a new electronics battle brewing in your garage, rather than your pocket. The talk of smartphone SoC technology proliferating from phones and into cars has finally transformed into action, and major electronics companies are striking deals with established automobile manufacturers to integrate the benefi... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 25 Jul, 2014 - Comments: 0

Here’s a sad commentary on the state of Japan’s electronics industry: Some Japanese electronics giants are converting unused factories and fabs into agricultural growing facilities, according to The Wall Street Journal. Last month, for example, Fujitsu began selling lettuce from the Aizu-Wakamatsu plant. It's officially over. IBM's talks to sell its chip unit to GlobalFoundries have offi... » read more

The Week In Review: Design
By Ed Sperling - 25 Jul, 2014 - Comments: 0

Tools Sonics upgraded its on-chip network, improving support for memory subsystems as well as performance with guaranteed bandwidth allocation across multiple SOC flows. The company said these upgrades add support for the latest DDR4 and LPDDR4 memories, for the multi-threading capabilities of the Open Core Protocol interface, and while adding non-blocking concurrency technologies. Mentor G... » read more

Improving The PPA Equation
By Ed Sperling - 24 Jul, 2014 - Comments: 0

The next generation of semiconductors may look very much like the existing generation. But like the old Porsche ads that required arrows to point to the improvements, because from the outside things basically looked the same, there should be plenty of impressive stuff inside. As the cost per transistor continues to rise at advanced nodes, the focus for most companies is no longer about shrin... » read more

IP Integration Challenges Rising
By Ann Mutschler - 24 Jul, 2014 - Comments: 0

It’s not just [getkc id="80" comment="lithography"] that is putting a crimp in sub-28nm designs. As more functions, features, transistors and software are added onto chips, the pressure to get chips out the door has forced chipmakers to lean more heavily on third-party IP providers. Results, as you might expect, have been mixed. The number of blocks has mushroomed, creating its own web of ... » read more

EDA’s Hedge Plays
By Ed Sperling - 24 Jul, 2014 - Comments: 0

While 14/16nm process technologies with finFETs and double patterning have pushed complexity to new heights, the move to 10nm fundamentally will change a number of very basic elements of the design through manufacturing flow—and EDA vendors will be caught in the middle of having to make hard choices between foundries, processes, packaging approaches, and potentially which markets to serve. ... » read more

New Winners And Losers
By Brian Bailey - 24 Jul, 2014 - Comments: 0

During DAC 2013, Robert Colwell of DARPA said he was attempting to prepare the U.S. Dept. of Defense for what he believes is the cataclysm caused by the end of [getkc id="74" comment="Moore's Law"]. He asked the question, “What happens when we don’t have a new technology that doubles the number of transistors every couple of years?” Colwell believes that power is the primary reason why... » read more

High-Level Gaps Emerge
By Ann Mutschler - 24 Jul, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the attributes of a high-level, front-end design flow, and why it is needed at present with Leah Clark, associate technical director for digital video technology at Broadcom; Jon McDonald, technical marketing engineer at Mentor Graphics; Phil Bishop, vice president of the System Level Design System & Verification Group at Cadence; and Bernard Mu... » read more

2.5/3D IC – Do We Have Liftoff?
By Mike Gianfagna - 24 Jul, 2014 - Comments: 2

The challenges of Moore’s law scaling at advanced technolgy nodes are well documented. I won’t repeat them here. The benefits of “more than Moore” scaling (i.e., 2.5D and 3D ICs) are also well-known. This technology has shown great promise to provide an alternate path for large-scale integration. The technology has seen a lot of research effort, infrastructure support, standards develop... » read more

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