February 2015 - Page 2 of 10 - Semiconductor Engineering


Inside The Hybrid Memory Cube


The memory bandwidth requirements for today’s high-performance computing applications and next-generation networking applications have increased beyond what conventional memory architectures can provide. For example in a typical 400G networking application, packet buffer bandwidth requirement could be as high as 2,000 Gb/s. Achieving this level of bandwidth using the latest DDR4 memory te... » read more

Better Software. Faster! A Virtual Prototyping Case Study From Kyocera Document Solutions


From time to time I like to use this blog to provide you with an update about the "Better Software. Faster!" book that illustrates the best practices in virtual prototyping. This time, I am happy to announce that Mamoru Kani-san, senior manager, R&D department 22, software 2 R&D division of the corporate software development division of Kyocera Document Solutions, wrote a new case study... » read more

Feathers Ruffled By IEEE Patent License Changes


Standards are essential for any market to grow. Products that are completely proprietary tend to serve small niche markets whereas those based on standards can grow through collaborations, independent content creation, and many other ways. Just think about where we would be if there were no communications standards – no WiFi, no cellular standards. You would be locked into buying all of your ... » read more

Processor Use Models Evolving


Application-specific processing is a very broad category. It includes processors that are tuned for a specific application domain such as vision processing or software-defined radio for high-end wireless, or voice trigger in IoT devices. This category also includes narrowly focused processors optimized for a specific [getkc id="81" kc_name="SoC"], with a specific application within the chip. An... » read more

Defining Functional Accuracy


I have been heavily involved in a project that recently completed. It involved creating virtual platforms (VPs) for a number of Altera’s FPGA SoCs. If you’re interested in more information, an announcement on the VP availability went out last week. Some of the modeled platforms existed and some were in various stages of development. The goal of the project was to deliver functionally acc... » read more

Getting The Right Return On Invested Power Consumption


Three weeks ago, I participated in a panel on low power and modeling at the system level. It took place at DesignCon 2015 in Santa Clara, together with representatives from AMD, Avago, and Qualcomm. Interestingly enough, it gave me the opportunity to set some of the myths and dis-information about power consumption in emulation straight, but more on that later. The panel was moderated by Steve ... » read more

Streamlining Interconnect Integration Accelerates Globally Distributed Design


As system on chip designs grow more complex, it becomes more and more difficult for chip companies to optimize the work of their distributed design teams. While each separate team has an area of expertise and sets their focus on a particular aspect of the SoC, the hard part comes in integrating these individual design efforts together. When something goes wrong and it doesn’t work, the compan... » read more

Rethinking SoC Verification


The introduction of the iPhone in 2007 represented a fundamental shift in electronic system design: moving advanced processing power off of the desktop and into the hands of users everywhere, always. This shift has led to a revolution in mobile—the expansion into the Internet-of-Things, with wearables, connected automobiles and homes. This revolution is causing profound technology challeng... » read more

Debug This!


Class-based debug is not the same as debugging RTL. You don’t have to be an object-oriented programmer in order to debug a class-based testbench, which is just a bunch of objects – some statically created, some dynamic – which interact with the DUT. The upshot? Class based debug doesn’t have to be hard! To read more, click here. » read more

Blog Review: Feb. 25


Synopsys' Aron Pratt continues his series on SystemVerilog interfaces and strategies for dealing with parameterization. There are workarounds to the problems it introduces, but they come with a price. Mentor's John Day digs into Volvo's plans for autonomous autos. There are a lot of speedbumps ahead, and while it's easy to build a self-driving concept vehicle, actually getting on the road is... » read more

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