April 2016 - Page 2 of 10 - Semiconductor Engineering

UVM Register Layer: The Structure
By Henry Chan - 28 Apr, 2016 - Comments: 0

I don’t know about you, but I am looking forward to the day where we won’t even have to go to the doctor’s office for an exam. Instead, we will all have scanners in our homes that will transmit full digital models to our doctors who can then poke, prod, and examine us remotely. This is essentially what the UVM register layer allows and does. The UVM register layer acts similarly by mod... » read more

Earthquake Proof Your Software Development
By Malte Doerper - 28 Apr, 2016 - Comments: 0

In this blog we tend to focus on the benefits and opportunities that arise when using virtual prototyping. However, in real life we well know that any situation bears not only opportunities but also risks. I was reminded of this by the recent earthquake disaster in Kumamoto Japan. Having lived in the most earthquake prone areas in the world for the past 10 years, I know firsthand how easy it is... » read more

Deep Space Design Considerations
By Nicolas Williams - 28 Apr, 2016 - Comments: 0

The linchpin technology in a deep space telescope is the ability to efficiently convert analog image sensor data into digital data in order to beam home high-resolution images of astronomical objects. The analog-to-digital converters (ADC) must perform flawlessly once deployed, because it is not feasible to drive out 1 million miles into space to fix any problems. The next-generation success... » read more

Better Heterogeneous CPU Designs
By Ronan Synnott - 28 Apr, 2016 - Comments: 0

The trend toward heterogeneous CPU designs is growing. Case in point: The NXP i.MX7 family of devices have such a design. In this blog, I will discuss the (simple) steps necessary to get the most out of i.MX7 using the ARM Development Studio, more commonly known as DS-5, but the information applies to most similar systems. Compiling code depends greatly on the use case. Within DS-5, there... » read more

On The Verge
By Mike Gianfagna - 27 Apr, 2016 - Comments: 0

Anyone who has been following the IoT/IoE or whatever-you-want-to-call-it movement knows we’re on the eve of far-reaching, life-altering change. There will be billions of connected devices, all streaming information to gigascale cloud datacenters using big data analytics and deep machine learning. Somewhere along the way, we’ll discover important, useful information from all this tha... » read more

High-Bandwidth Memory
By eSilicon - 27 Apr, 2016 - Comments: 0

High-bandwidth memory (HBM) is a JEDEC-defined standard, dynamic random access memory (DRAM) technology that uses through-silicon vias (TSVs) to interconnect stacked DRAM die. In its first implementation, it is being integrated with a system-on-chip (SoC) logic die using 2.5D silicon interposer technology. This white paper explains HBM’s value proposition, and how these five companies make... » read more

Plan-Based Analog Verification Methodology
By Cadence - 27 Apr, 2016 - Comments: 0

The ability to verify all the aspects of an analog design and to keep track of all the different verification tasks is a growing challenge. Manual attempts to do so often lead to mistakes since they rely on constantly updated documents. The Cadence Virtuoso ADE Verifier provides an overarching verification plan that links to all analog tests across multiple designers. The Virtuoso ADE Verifie... » read more

Analog-To-Digital Conversion Is Key For Deep Space Exploration With The James Webb Space Telescope
By Mentor, a Siemens Business - 27 Apr, 2016 - Comments: 0

Reflect back to your last design project. Did it have leading-edge requirements that seemed impossible at the time to fulfill? Now think about a design that needs to live in the harsh environment of space. A device that has to sip power and function flawlessly for over a decade because there is no opportunity to service it if anything goes wrong. That is the set of requirements that faced Dr. L... » read more

Securing The Internet of Things Using Hardware Rooted Processor Security — An Architect’s Guide
By Synopsys - 27 Apr, 2016 - Comments: 0

Security is a key requirement for Internet of Things (IoT) devices and must be considered for all aspects of the design. This paper provides an overview of security basics, feature requirements, technical solutions, and associated system-level trade-offs for implementing security in IoT devices. Making the required trade-offs is significantly easier by leveraging secure, proven building blocks ... » read more

SoC Verification Made Easy
By Aldec - 27 Apr, 2016 - Comments: 0

As designs grow larger, the time spent verifying a project is growing longer as well. As a solution, some companies are trying to ‘shift-left’ their schedules. Verification via software simulators is not fast enough for large System-on-Chip (SoC) design projects, there-fore one option is to use an FPGA emulator to speed up the design process. But what happens when a bug occurs? This docu... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy