August 2017 - Page 2 of 12 - Semiconductor Engineering


Tools To Design CNNs


Convolutional neural networks are becoming a mainstay in machine learning and artificial intelligence, allowing a network of distributed sensors to collect data and send them to a central brain for processing. This is a relatively simple idea in comparison to today's technology, and the idea of the [getkc id="261" kc_name="convolutional neural network"] has been around for some time. But bui... » read more

What’s New At Hot Chips


By Jeff Dorsch & Ed Sperling Machine learning, artificial intelligence and neuromorphic computing took center stage at Hot Chips 2017 this week, a significant change from years past where the focus was on architectures that addressed improvements in speed and performance for standard compute problems. What is clear, given the focus of presentations, is that the bleeding edge of comput... » read more

The Week In Review: Manufacturing


Packaging and test IoT chip startup zGlue recently announced its technology, dubbed the zGlue Integrated Platform (ZiP). In ZiP, chip customers select and configure their designs based on chiplets. Chiplets are proven silicon IP from existing vendors. Then, the technology automatically generates potential implementations of a design. As part of the effort, zGlue has selected Advanced Semicondu... » read more

The Week In Review: IoT


Deals Advanced Semiconductor Engineering was selected by zGlue as its strategic manufacturing partner. The ASE Group will make the zGlue Integrated Platform, which is said to enable customization for consumer and industrial IoT markets. The ZiP integrates hardware and software in a modular 3DIC-based platform. ASE will assemble zGlue-certified chiplets for connecting through zGlue Smart Fabric... » read more

The Week In Review: Design


Tools Ansys updated its simulation suite, improving the speed of PCB and electronic package simulation as well as integrating its embedded systems tool with its failure analysis capabilities. Other updates include a new visual ray tracing capability to aid in antenna placement, improved modeling of the quality of wireless links in the presence of electromagnetic interference and RF interferenc... » read more

One Belt, One Road


China's so-called One Belt, One Road policy on global trade could have significant repercussions on semiconductors and IP if it succeeds. It's hardly a slam-dunk, and China has been vying for a larger position in the semiconductor industry for some time. But this is a completely different strategy because China is not attempting to go it alone this time. China has been rather quietly build... » read more

Collaborative Multi-Board System Design


Designing electronic systems has become measurably more complex during the past decade. Many of the products that are developed today are in-fact complex interconnected systems. Using the automotive market as an example, the first level of a system is an element; an individual component or sub-assembly that is designed to be part of a larger collaborating function. At the next level is the sub-... » read more

The Semiconductor Industry’s Big Opportunity


Safety critical device development, particularly in the automotive electronics space, has the attention of the entire semiconductor industry. Not surprising, since next-generation cars represent the biggest opportunity yet since mobile devices. However, what’s less obvious are the various phases of this megatrend that represent real convergence from many specializations. Traditional automo... » read more

Portable Stimulus Status Report


The first release of the Portable Stimulus (PS) standard is slated for early next year. If it lives up to its promise, it could be the first new language and abstraction for verification in two decades. [getentity id="22028" e_name="Accellera"] uncorked the PS Early Adopter release at the Design Automation Conference (DAC) in June. The standard has been more than two years in the making by t... » read more

Training As A Strategic Weapon


In my last post, I discussed the topic of applying machine learning to the design of machine learning chips. I pointed out that one can achieve significant improvements in schedule predictability, PPA compliance and an overall reduction in program risk if machine learning is applied to the right kind of knowledge base. This is very real, and we are seeing the benefits of this approach daily. Bu... » read more

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