July 2018 - Semiconductor Engineering

Manufacturing Bits: July 31
By Mark LaPedus - 31 Jul, 2018 - Comments: 0

Florida R&D fab A new microelectronics R&D initiative in Florida is expanding its operations and readying its new 200mm fab facility. The initiative, called BRIDG, describes itself as a non-profit, public-private partnership. BRIDG is basically an R&D microelectronics facility, which is focusing on the development of select technologies, such as photonics, sensors, imagers and 2.5D/3D pac... » read more

System Bits: July 31
By Ann Mutschler - 31 Jul, 2018 - Comments: 0

Computers that perceive human emotion As part of the growing field of “affective computing,” MIT researchers have developed a machine-learning model that takes computers a step closer to interpreting our emotions as naturally as humans do. Affective computing uses robots and computers to analyze facial expressions, interpret emotions, and respond accordingly. Applications include, for ... » read more

Power/Performance Bits: July 31
By Jesse Allen - 31 Jul, 2018 - Comments: 0

Training optical neural networks Researchers from Stanford University used an optical chip to train an artificial neural network, a step that could lead to faster, more efficient AI tasks. Although optical neural networks have been recently demonstrated, the training step was performed using a model on a traditional digital computer and the final settings were then imported into the optical... » read more

High-Speed SerDes At 7nm
By Ed Sperling - 30 Jul, 2018 - Comments: 0

eSilicon’s David Axelrad discusses the challenges with 56Gbps and 112Gps SerDes, and why the switch from analog to digital is required for performance and low power. https://youtu.be/E-CU8TLvjjc » read more

Why Parallelization Is So Hard
By Brian Bailey - 30 Jul, 2018 - Comments: 2

Semiconductor Engineering sat down to talk about parallelization efforts within EDA with Andrea Casotto, chief scientist for Altair; Adam Sherer, product management group director in the System & Verification Group of Cadence; Harry Foster, chief scientist for Mentor, a Siemens Business; Vladislav Palfy, global manager for applications engineering at OneSpin; Vigyan Singhal, chief Oski for ... » read more

Not Enough Respect For SoC Interconnect
By K. Charles Janac - 30 Jul, 2018 - Comments: 0

For high-volume system-on-chip (SoC) applications—artificial intelligence (AI), automotive, mobility, solid state drives and more—effective interconnect technology can generate hundreds of millions of dollars in revenue due to smaller chip area, better functionality and faster delivery of SoC platforms. State-of-the-art interconnect technology also allows chip designers to create SoC deriva... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 27 Jul, 2018 - Comments: 0

Trade issues China and the United States are embroiled in a trade war. What is the impact? In testimony submitted to the Office of the United States Trade Representative (USTR) on the proposed tariffs on Chinese products, Consumer Technology Association (CTA) Vice President of International Trade Sage Chandler argues tariffs negatively impact businesses and consumers as well as fail to corr... » read more

Pros, Cons Of ML-Specific Chips
By Ed Sperling - 27 Jul, 2018 - Comments: 1

Semiconductor Engineering sat down with Rob Aitken, an Arm fellow; Raik Brinkmann, CEO of OneSpin Solutions; Patrick Soheili, vice president of business and corporate development at eSilicon; and Chris Rowen, CEO of Babblelabs. What follows are excerpts of that conversation. To view part one, click here. Part two is here. SE: Is the industry's knowledge of machine learning keeping up with th... » read more

Will FPGAs Work As Expected?
By Ed Sperling - 27 Jul, 2018 - Comments: 1

OneSpin Solutions’ Muhammed Haque Khan, product specialist for synthesis verification, digs into equivalence checking in FPGA designs and what can go wrong with FPGA designs. https://youtu.be/RFlP2Z_-Yqs » read more

Week In Review: Design, Low Power
By Jesse Allen - 27 Jul, 2018 - Comments: 0

Tools & IP Cadence uncorked the latest version of the Sigrity signal integrity analysis family of tools, adding a 3D design and 3D analysis environment integrated with Allegro PCB tools that allows users to import mechanical structures, such as cables and connectors, and merge them with the PCB for modeling and optimization as one structure. It also adds full Rigid-Flex PCB extraction from... » read more

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