Author's Latest Posts


Blog Review: Nov. 21


Cadence's Paul McLellan looks at why specialized architectures will be the future of processor development, why general purpose processors are a poor match for AI, and other highlights from the recent Linley Processor Conference. Mentor's Harry Foster focuses on what's happening in FPGA design and the factors that are adding to increasing design and verification complexity. Synopsys' Lewi... » read more

Week In Review: Design, Low Power


Cadence taped out a complete GDDR6 memory IP solution consisting of PHY, controller and Verification IP on Samsung's 7LPP process. The GDDR6 IP allows up to 16Gb/sec bandwidth per pin, or over 500Gb/sec peak bandwidth between the SoC and each GDDR6 memory die. It is targeted at very high-bandwidth applications including AI, cryptocurrency mining, graphics, ADAS and HPC. ClioSoft debuted a So... » read more

Power/Performance Bits: Nov. 20


In-memory compute accelerator Engineers at Princeton University built a programmable chip that features an in-memory computing accelerator. Targeted at deep learning inferencing, the chip aims to reduce the bottleneck between memory and compute in traditional architectures. The team's key to performing compute in memory was using capacitors rather than transistors. The capacitors were paire... » read more

Week In Review: Design, Low Power


Tools & Standards Mentor uncorked a PCB design platform for non-specialist PCB engineers focused on multi-dimensional verification. The Xpedition platform can integrate a range of verification tools within a singular authoring environment, providing automatic model creation, concurrent simulation, cross probing from results, and error reviews to identify problems at the schematic or layout... » read more

Blog Review: Nov. 14


Mentor's Jin Hou and Joe Hupcey III explain two fundamental characteristics of formal analysis that simplify things for the formal algorithm and provide better wall clock run time and memory usage performance. Cadence's Paul McLellan shares highlights from five presentations all discussing what's behind AI's movement to edge devices, the vast amount of investment going into the area, and whe... » read more

Power/Performance Bits: Nov. 13


ML identifies LED material Researchers at the University of Houston created a machine learning algorithm that can predict a material's properties to help find better host material candidates for LED lighting. One recommendation was synthesized and tested. The technique, a support vector machine regression model, was efficient enough to run on a personal computer. It scanned a list of 118,28... » read more

Week In Review: Design, Low Power


M&A SMIT Holdings acquired S2C, a provider of FPGA prototyping hardware and software as well as interfaces and accessories, for $19 million, plus up to US$2 million in milestone based payments to the key management team. S2C was founded in 2003. SMIT, based in Hong Kong, makes pay TV broadcasting access and mobile point-of-sale payment systems for the Chinese market. Tools & IP Syn... » read more

Blog Review: Nov. 7


Arm's Shidhartha Das looks into maximizing the benefits of power delivery networks and explains a non-intrusive technique using an on-chip digital storage oscilloscope that can directly sample the power-rails to probe potential runtime bugs due to power delivery weaknesses. Synopsys' Snigdha Dua argues that scrambling is one of the most important features introduced in HDMI 2.0 and takes a l... » read more

Power/Performance Bits: Nov. 6


Camera for object recognition Researchers from the University of Illinois at Urbana-Champaign developed a new camera that could improve object detection in vehicles. Inspired by the visual system of mantis shrimp, the camera detects the polarization of light and has a dynamic range about 10,000 times higher than today's commercial cameras. "In a recent crash involving a self-driving car, th... » read more

The Week In Review: Design


M&A GlobalFoundries formed Avera Semiconductor, a wholly-owned subsidiary focused on custom ASIC designs. While Avera will use its relationship with GF for 14/12nm and more mature technologies, it has a foundry partnership lined up for 7nm. The new company's IP portfolio includes high-speed SerDes, high-performance embedded TCAMs, ARM cores and performance and density-optimized embedded SR... » read more

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