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Week In Review: Manufacturing, Test


Market research What’s the CapEx outlook for 2020? Semiconductor capital spending is down in 2019, but the industry faces another slump in 2020, according to IC Insights. The firm sees a 15% decline in CapEx for 2019 with a 5% drop expected in 2020. New 300mm fab construction in Korea is still going strong despite the memory downturn, according to SEMI. “Korea’s fab construction spen... » read more

Manufacturing Bits: June 25


Panel-level consortium Fraunhofer is moving forward with the next phase of its consortium to develop technologies for panel-level packaging. In 2016, Fraunhofer launched the original effort, dubbed the Panel Level Packaging Consortium. The consortium, which had 17 partners, developed various equipment and materials in the arena. Several test layouts were designed for process development on ... » read more

5nm Vs. 3nm


Foundry vendors are readying the next wave of advanced processes, but their customers will face a myriad of confusing options—including whether to develop chips at 5nm, wait until 3nm, or opt for something in between. The path to 5nm is well-defined compared with 3nm. After that, the landscape becomes more convoluted because foundries are adding half-node processes to the mix, such as 6nm ... » read more

Week In Review: Manufacturing, Test


Trade wars In recent testimony before a U.S. government panel considering tariffs on $300 billion worth of Chinese goods, SEMI called for the removal of about 30 tariff lines. These items are central to the semiconductor manufacturing process. “SEMI asserts that these tariffs will harm not only companies operating in the U.S., but other companies as well in the semiconductor supply chain... » read more

Falling Chip Forecasts


It’s time to take a pulse of the semiconductor market amid the memory downturn and trade frictions with China. For some time, the DRAM and NAND markets have been hit hard with falling prices and oversupply. Then, the Trump administration last year slapped tariffs on Chinese goods. China retaliated. And the trade war rages on between the U.S. and China. More recently, the U.S. Department... » read more

What’s Next In Advanced Packaging


Packaging houses are readying the next wave of advanced IC packages, hoping to gain a bigger foothold in the race to develop next-generation chip designs. At a recent event, ASE, Leti/STMicroelectronics, TSMC and others described some of their new and advanced IC packaging technologies, which involve various product categories, such as 2.5D, 3D and fan-out. Some new packaging technologies ar... » read more

Sidestepping Moore’s Law


Calvin Cheung, vice president of engineering at ASE, sat down with Semiconductor Engineering to talk about advanced packaging, the challenges involved with the technology, and the implications for Moore’s Law. What follows are excerpts of that conversation. SE: What are some of the big issues with IC packaging today? Cheung: Moore’s Law is slowing down, but transistor scaling will co... » read more

Manufacturing Bits: June 18


Making microvias in packages At the recent IEEE Electronic Components and Technology Conference (ECTC) in Las Vegas, Georgia Institute of Technology, Tokyo Ohka Kogyo (TOK) and Panasonic presented a paper on a technology that enables ultra-small microvias for advanced IC packages. Researchers demonstrated a picosecond UV laser technology as well as materials, which enabled 2μm to 7μm vias... » read more

Week In Review: Manufacturing, Test


Market research In the second quarter of 2019, TrendForce said that the top-5 foundry rankings remained identical with that of last year. But sixth to tenth place showed some changes. Who is up or down in what is a tough business climate? Global fab equipment spending will rebound in 2020, growing 20% to $58.4 billion after dropping 19% to $48.4 billion in 2019, according to SEMI. However, ... » read more

Inspection, Metrology Challenges Grow For SiC


Inspection and metrology are becoming more critical in the silicon carbide (SiC) industry amid a pressing need to find problematic defects in current and future SiC devices. Finding defects always has been a challenging task for SiC devices. But it’s becoming more imperative to find killer defects and reduce them as SiC device vendors begin to expand their production for the next wave of a... » read more

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