Author's Latest Posts

Scaling Automated Software Testing With Virtualizer Development Kits
By Synopsys - 21 Dec, 2015 - Comments: 0

In this whitepaper we will discuss how simulation-based Virtualizer Development Kits (VDKs) enable software to be tested in a system context much earlier, bridging the gap with unit and integration testing. Moreover, we will discuss how VDKs offer a more scalable solution as they consist of simulation models and hence alleviate the dependency on hardware labs. To read more, click here. » read more

Safety in SoCs
By Synopsys - 09 Dec, 2015 - Comments: 0

Today’s system-on-chip (SoC) designs are becoming more complex, increasing the pressure on verification and design teams to deliver fully functional designs. Recent studies have shown that over 50% of the development time on a complex IC is now being spent on verification, revealing the severity of the problem project teams are facing. As more SoC designs are used in electronic systems deploy... » read more

Software is Eating the World
By Synopsys - 23 Nov, 2015 - Comments: 0

The statement "software is eating the world" was coined by internet pioneer Marc Andreessen in 2011. Over the last decade, the role of electronics in our daily life has changed dramatically. To read more, click here. » read more

Design, Test & Repair Methodology For FinFET-Based Memories
By Synopsys - 11 Nov, 2015 - Comments: 0

Like any IP block, memories need to be tested. But unlike many other IP blocks, memory test is not as simple as pass/fail. The advent of FinFET-based memories presents new memory test challenges. This white paper covers: The new design complexities, defect coverage and yield challenges presented by FinFET-based memories. How to synthesize test algorithms for detection and diagnosis of Fin... » read more

FinFET Technology
By Synopsys - 23 Sep, 2015 - Comments: 0

This white paper discusses the major challenges with FinFETs and how TSMC has been collaborating with Synopsys, one of their ecosystem partners, to deliver a complete solution. Key elements of this solution include comprehensive FinFET profiling without impact to design tool runtime and proven, verified IP availability. The TSMC 16-nm FinFET solution will ensure mutual customers swiftly move to... » read more

Anatomy Of The HDMI IP Certification Flow
By Synopsys - 09 Sep, 2015 - Comments: 0

HDMI IP plays a critical role in enabling HDMI 2.0 features, making 60 frames per second UHD video and audio possible in multimedia SoCs. SoC designers can avoid costly functionality and interoperability issues by selecting and integrating HDMI IP that has gone through an extensive multi-phase testing process and achieved certification. This white paper outlines the HDMI IP certification flow f... » read more

Delivering Functional Verification Engagements
By Synopsys - 26 Aug, 2015 - Comments: 0

With the advent of smarter and higher performing devices, there has been a tremendous increase in design complexity. Driven by new high-end hardware feature and intelligent software requirements, these devices are comprised of multi-core processors and a multitude of interface IP, memory and other analog circuitry, communicating via many different interface protocols. This poses a huge challeng... » read more

Power Hungry?
By Synopsys - 12 Aug, 2015 - Comments: 0

Rapid changes in SoC power issues have forced a rethinking of methodologies throughout the design flow to account for power-related effects. At 65 nanometer process nodes and below, leakage power and dynamic power consumption make it increasingly difficult to meet power budgets. Achieving timing and signal integrity closure is now tightly coupled with power optimization and power net distributi... » read more

Is Your Automotive Software Robust Enough for Hardware Faults?
By Synopsys - 29 Jul, 2015 - Comments: 0

In this whitepaper, we will apply virtual Fault Mode and Effect Analysis (FMEA) concepts on a specific case study, an Electrical Vehicle Powertrain (EVP) system. We will show how this EVP system is refined from a Software-in-the Loop (SIL) level to a virtual Hardware-in-the-Loop level (vHIL), using a Virtualizer Development Kit (VDK). Hardware faults are applied to the resulting system and its ... » read more

PCI Express 4.0 Controller Design And Integration Challenges
By Synopsys - 08 Jul, 2015 - Comments: 0

Designers need to start planning for PCI Express 4.0 integration now, because decisions for the PCIe 4.0 controller can have far-reaching consequences for the entire SoC. This paper describes the market adoption and expected use of PCIe 4.0; covers the specification; and discusses three challenges the new specification brings to controller designers. Outline Markets & Applications fo... » read more

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