Unblocking The Full Potential Of PCIe Gen6 With Shared Flow Control


As technology advances at a rapid pace, PCI Express (or PCIe) has grown tremendously, allowing data transfer up to 64 GT/s in Gen6. This technology is widely used in data centers, artificial intelligence and machine learning computing, high-performance computing accelerators, and high-speed applications—including high-end SSDs, automotive, IoT, and mil-aero. To fully utilize this high-spee... » read more

Low-Power IC Design Without Compromise


In the process of creating ICs, the digital implementation stage is focused on meeting the performance, power, and area (PPA) targets defined for the design. Traditionally, when talking about PPA metrics, “performance” has been the primary focus, with power and area recovered where possible, after meeting timing. But as designs have moved to smaller, more advanced process nodes, and as s... » read more

Everything, Everywhere, All At Once: Big Data Reimagines Verification Predictability And Efficiency


Big data is a term that has been around for many years. The list of applications for big data are endless, but the process stays the same: capture, process and analyze. With new, enabling verification solutions, big data technologies can improve your verification process efficiency and predict your next chip sign-off. By providing a big data infrastructure, with state-of-the-art technologies... » read more

Power Integrity Analysis For High-Performance FPGAs


Efinix high-performance Titanium field-programmable gate arrays (FPGAs) are custom-tailored for the computing demands of mainstream applications, targeting markets from intelligent edge devices to industrial automation to vision systems to edge servers and communications (figure 1). Efinix customers use the Titanium line of FPGAs to ensure their complex, high-performance designs minimize power ... » read more

Ready, Set, Go: Outrunning Moore’s Law With 3D-IC


By Anthony Mastroianni and Gordon Allan, Siemens EDA 3D ICs are an exciting and promising extension of heterogeneous advanced package technology into the third dimension. Although far from mainstream, 3D IC’s time is coming, as chiplet standardization efforts and supporting tool developments begin to make 3D IC practicable and profitable to more players – big and small – and products w... » read more

Are You Paying Proper Attention To Your ESD Design Windows?


Electrostatic discharge (ESD) issues in integrated circuit (IC) chip designs have become more critical at advanced semiconductor process nodes, due to shrinking transistor dimensions and oxide layer thickness [1]. There are many ESD design rules and flows that designers check for common ESD issues, such as topological checks for the existence of ESD protection devices, current density (CD) chec... » read more

Minimizing EM/IR Impacts On IC Design Reliability And Performance


By Joel Mercier and Karen Chow As technologies and foundry process nodes continue to advance, it gets more difficult to design and verify integrated circuits (ICs). The challenges become even more apparent in 5nm and below nodes, and as the industry moves away from fin field-effect transistor (finFET) and into gate-all-around field-effect transistor (GAAFET) technologies. There are many prob... » read more

Cloud-Ready Circuit Simulation Accelerates SoC Verification


By Nebabie Kebebew and Nigel Bleasdale Driven by the explosion of big data and expanding applications, chip design complexity is increasing. Applications such as high-performance computing (HPC), the Internet of Things (IoT), automotive, and 5G mobile and communications coupled with advanced process technology nodes require running a large number of circuit simulations to ensure the circuits... » read more

Using ML Methods In Production-Ready Engineering Solutions For IC Verification


By WeiLii Tan & Jeff Dyck Semiconductor designs continue to push the envelope of performance, functionality, and efficiency while their application scope expands in high-performance computing, automotive solutions, and IoT devices. The increased design complexity, scale, and mission-critical operations of semiconductor designs mean that IC verification strategies must evolve to cover expon... » read more

Emulation-Centric Power Analysis Of SoC Designs


Verification expert Lauro Rizzatti recently interviewed Jean-Marie Brunet, senior marketing director, Scalable Verification Solutions Division (SVSD), Siemens EDA, about the importance of accurate power estimation and optimization for system-on-chip (SoC) designs. What is the problem facing the semiconductor industry today regarding pre-silicon power estimation? The problem is the discrep... » read more

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