Deriving Configuration Time For eFPGAs


Part 1 of this blog post described how to configure an eFPGA, using Achronix’s Speedcore eFPGA as an example. It explained why each instance of the eFPGA in an ASIC or SoC design must be configured after the system powers up due to its nonvolatile SRAM technology to store configuration bits. This post will detail how the configuration time is derived, once again using Speedcore eFPGA as th... » read more

The Importance Of An eFPGA’s Configuration Interfaces


eFPGAs are heralded throughout the semiconductor industry for their flexibility and programmability, especially when it comes to high-performance compute applications. Let’s take a closer look at how an eFPGA is configured. Each instance of the eFPGA in an ASIC or SoC design must be configured after the system powers up because this eFPGA employs nonvolatile SRAM technology to store its co... » read more

Hardware Acceleration With eFPGAs


If integrating an embedded FPGA (eFPGA) into your ASIC or SoC design strikes you as odd, it shouldn’t. ICs have been absorbing almost every component on a circuit board for decades, starting with transistors, resistors, and capacitors –– then progressing to gates, ALUs, microprocessors, and memories. FPGAs are simply one more useful component in the tool box, available for decades and ... » read more

eFPGAs Accelerate Data-Centric Processing


With the ever-increasing requirements to manage and process enterprise data, system architects are looking closer than ever at programmable logic, a technology to make computing much more efficient and secure. While traditional processors force data into their pipelines through a complex hierarchy of caches, programmable logic makes it possible to construct data pipelines. Data can flow seam... » read more

Embedded FPGA: Increasing Security In Next-Gen Networks


The pull of data toward real-time applications on the network’s edge makes the outflow of processing from the cloud inevitable. Programmable logic provides the ability to make computing much more data-centric. While traditional processors demand data to be fed to their pipelines through a complex hierarchy of memory caches, programmable logic makes it possible to construct data pipelines. Dat... » read more

AI’s Requirements Call For eFPGAs


A recent report claims the United States Navy plans to expand its Consolidated Afloat Networks and Enterprise Services ocean combat network (CANES) with Artificial Intelligence, connecting ships, submarines and on-shore naval stations. This news confirms that AI is reshaping the world we live in and opening opportunities in commercial and industrial systems applications that range from autonomo... » read more

Self-Driving Cars At CES: The Future Of Transportation Is Here


CES 2018 attendees will get a new kind of tech demo in just a few weeks. When they hail Lyft to take them from the Las Vegas Convention Center across town, it will be a fully automated point-to-point vehicle getting them there. While we marvel now, today’s novelty will be tomorrow’s norm, though questions about the safety of autonomous driving persist. For the CES demo, a backup pilot wi... » read more

The Case For Combining CPUs With FPGA Fabrics


Given that the industry is beginning to reach the limits of what can physically and economically be achieved through further shrinkage of process geometries, reducing feature size and increasing transistor counts is no longer achieving the same result it once did. Instead the industry is, quite rightly, focusing on fundamentally new system architectures and making better use of available silico... » read more

Basics Of Embedded FPGA Acceleration


Making a chip run faster is no longer guaranteed by shrinking features or moving to a different manufacturing process. It now requires a fundamental change in the architecture of the chip itself. The days of the single-processor, or even single multi-core processors, are gone. The focus has shifted to different kinds of processors for different kinds of data and many different protocols and ... » read more

How To Close Timing With An eFPGA Hosted In An SoC


eFPGAs are embeddable IP that include look-up tables, memories, and DSP building blocks, allowing designers to add a programmable logic fabric to their SoC. The Speedcore IP can be configured to any size as dictated by the end application. The SoC supplier defines the number of LUTs, memory resources, and DSP64 blocks for their Speedcore instance. A short time later, Achronix delivers the IP as... » read more

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