A Vision For Electronics Supply Chain Management


Supply chain disruptions and chip shortage have become household terms in recent times. COVID-19 highlighted the vulnerability of supply chains of countless industries and their critical role in the global economy. Companies across the electronics manufacturing value chain have been affected. At last count, the semiconductor shortage has already cost the automotive industry alone over $150 bill... » read more

Deep Learning (DL) Applications In Photomask To Wafer Semiconductor Manufacturing


How Advantest Corporation, ASML, Fraunhofer, imec, Siemens EDA and others are using deep learning in semiconductor manufacturing. Click here to read more. » read more

Review Of Virtual Wafer Process Modeling And Metrology For Advanced Technology Development


Semiconductor logic and memory technology development continues to push the limits of process complexity and cost, especially as the industry migrates to the 5 nm node and beyond. Optimization of the process flow and ultimately quantifying its physical and electrical properties are critical steps in yielding mature technology. The standard build, test, and wait model of technology development ... » read more

Secure Movement Of Data In Test


Historically, test data flowed out of the tester and was loaded into a file. But with heterogeneous integration, including chiplets and IP from multiple vendors, test data is now being streamed across the manufacturing floor where it can be used to make real-time decisions. Eli Roth, product manager for smart manufacturing at Teradyne, talks with Semiconductor Engineering about challenges in da... » read more

Early STEM Education Key To Growing Future Chip Workforce


A key factor in building a domestic workforce for the chip industry is attracting kids to science, technology, engineering, and math (STEM) subjects at a younger age. That way they are more likely to follow through and attain the skills and degrees needed to enter the semiconductor job market. Industry and government are partnering with schools and community organizations to address the chal... » read more

Digital Twins Target IC Tool And Fab Efficiency


Digital twins have emerged as the hot "new" semiconductor manufacturing technology, enabling fabs to create a virtual representation of a physical system on which to experiment and optimize what's going on inside the real fab. While digital twin technology has been in use for some time in other industries, its use has been limited in semiconductor manufacturing. What's changing is the breadt... » read more

Silicon Photonics Manufacturing Ramps Up


Circuit scaling is starting to hit a wall as the laws of physics clash with exponential increases in the volume of data, forcing chipmakers to take a much closer look at silicon photonics as a way of moving data from where it is collected to where it is processed and stored. The laws of physics are immutable. Put simply, there are limits to how fast an electron can travel through copper. The... » read more

Powering CFETs From The Backside


The first CMOS circuits to incorporate backside power connections are likely to be based on stacked nanosheet transistors, but further down the road, planners envision complementary transistors (CFETs) that vertically integrate stacked NFET and PFET devices. With at least twice the thickness of a nanosheet transistor, connecting CFETs to each other and to the rest of the circuit is likely to... » read more

Package Integrated Vapor Chamber Heat Spreaders


With continuous increases in computational demand in nearly all electronics market segments, even historically lower power packaging is being driven into challenging thermal management situations. Node shrink alone is reaching a limit in maintaining track with Moore’s law. The economics and yield challenges of large monolithic system on chip (SoC) designs are driving the development of silico... » read more

The High NA EUV Imperative: How Computational Lithography Solutions Enable Us To Think Smaller


The future of computing depends on miniaturization, and extreme ultraviolet lithography (EUV) is one key enabler. Until recently, we have relied on low numerical aperture (NA) EUV systems with an aperture of 0.33 to help us reduce the size of integrated circuits (ICs). As with deep ultraviolet (DUV) technology, this has begun to reach its limits. High NA EUV lithography with a 0.55 aperture rep... » read more

← Older posts Newer posts →