Unlocking PPA Benefits of Backside Routing


The power delivery network (PDN) is a critical part of any modern semiconductor device. Even with advanced power-saving technologies, today’s chips are hungry for power. Traditionally, power is distributed through metal layers on the same side of the substrate as the signal metal layers. This creates competition for the available layers and pushes the limits of fabrication technology to add m... » read more

Performance Boost In Powerful Real-Time Cortex-R Processor Using Data Prefetch Control


High-performance processors employ hardware data prefetching to reduce the negative performance impact of large main memory latencies. An effective prefetching mechanism can improve cache hit rate significantly. Data prefetching boosts the execution performance by fetching data before it is needed. While prefetching improves performance substantially on many programs, it can significantly red... » read more

Hybrid Methodology To Extract Kinetic And Magnetic Inductances For Superconductor Technologies


Integrated circuits (ICs) using superconductors have emerged as the technology of choice for artificial intelligence (AI), data centers, and cloud computing. However, innovative technology requires equally innovative physical verification solutions to ensure that these superconductor ICs deliver the performance and reliability they promise. We introduce an innovative hybrid methodology to extra... » read more

Low-Power Relaxation Oscillator With Temperature-Compensated Thyristor Decision Elements


This paper presents a low-power 140 kHz relaxation oscillator (ROSC) for low-frequency clock generators and timers. In voltage-mode ROSCs, unavoidable shunt current consumption results from voltage slewing at the integration capacitor. The proposed circuit employs CMOS thyristor-based decision elements which effectively reduce shunt currents by exploiting internal positive feedback. A complemen... » read more

PCI Express Test Overview


PCl Express, short for Peripheral Component Interconnect Express, is a high-performance and high-bandwidth serial communication interconnect standard. First proposed by Intel and further developed by the Peripheral Component Interconnect Special Interest Group (PCI-SIG) in replacement of bus-based communication architecture, such as PCI, PCI Extended (PCI-X), and Accelerated Graphics Port (AGP)... » read more

Quantum Well Design Basics


Key Takeaways The choice of materials for the quantum well and barrier layers is paramount. Materials must have compatible lattice structures to minimize defects, with common combinations including GaAs/AlGaAs, InGaAs/InP, and GaN/AlGaN. The width of the quantum well significantly influences the energy levels and density of states, where narrower wells result in greater separation betwe... » read more

Amplify Simulation Via Effective Data And Process Management


Over the past 50 years, engineering simulation has proven its value by reducing development time and costs, as well as dramatically improving product performance. By subjecting their designs to real-world physical forces in a risk-free virtual environment, product development teams can identify issues and address them at an early stage, thus minimizing expensive rework, prototyping, and physica... » read more

Fabrication Of Vertical-Taper Structures For Silicon Photonic Devices By Using Local-Thickness-Thinning Process


Authors: Shunsuke Abe, Hideo Hara, Shin Masuda, and Hirohito Yamada. This paper describes a simple fabrication process of verticaltaper structures which can locally tune the thickness of silicon photonic devices. For low-loss spot-size conversion, taper angles less than 10° are required. To fabricate the gradual-slope shape of the vertical tapers, we have developed a step-andexposure lithog... » read more

Non-Destructive Metrology Techniques For Measuring Hole Profile In DRAM Storage Node


DRAM storage node profile measurement during high aspect ratio (HAR) etch has been one of the most challenging metrology steps. DRAM storage node profile affects refresh time and device electric quality. So, controlling this profile is one of the key challenges. Conventional 3D modeling in Optical Critical Dimension (OCD) metrology has typically used multiple cylinder stacks. This method cannot... » read more

Paradigms Of Large Language Model Applications In Functional Verification


This paper presents a comprehensive literature review for applying large language models (LLM) in multiple aspects of functional verification. Despite the promising advancements offered by this new technology, it is essential to be aware of the inherent limitations of LLMs, especially hallucination that may lead to incorrect predictions. To ensure the quality of LLM outputs, four safeguarding p... » read more

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