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Arm

What will I be accountable for?

Use of synthesis, place and route to develop best in class Arm IP
Evaluation of results for flow improvements and RTL feedback
Resolving place and route issues to improve performance and power
Development of floorplans and floorplanning to meet design requirements
Verification of functionality, speed & power of developed design
Development of high performance, low power clock distribution
Investigate and adopt new methodologies to improve design timing and power
Supplemental script writing to enhance flow and gathering of vital statistics
Working closely with other team members both locally and globally to complete design milestones
Working with EDA tool vendors on recommended flows for Arm core

For additional details and most recent updates, hit “Apply for job”