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Arm

About the Role

As a Memory System / Interconnect Design Engineer, you will be part of the Systems and Software team focused on next-generation interconnects targeting high-end mobile, networking, and enterprise markets. You will contribute to the specification, microarchitecture and RTL design of high-performance, energy-efficient interconnects. This opportunity is specific to a confidential project, and as part of this small and talented team, you will be able to expand your technical breadth relating to leading-edge interconnects, including multi-chip, IO acceleration, and new memory technologies. In addition, your close collaboration with other Austin-based CPU and System IP engineering teams leads to complete IP solutions to address the performance, power and cost requirements for almost all application markets.

What will I be accountable for?

Interconnect Micro-architecture specification and RTL design
Verilog RTL logic design and debug
Working closely with performance modeling, validation, and implementation teams to meet all functional requirements, performance, power and area goals

For more details, hit “Apply for job”