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Arm

What will I be accountable for?

Working closely with the Verification and RTL design team to identify the opportunities for improvements to the current simulation verification methodologies
Developing and improving architecture of SystemVerilog/UVM testbenches for functional verification of CPU and its components
Working with EDA vendors to introduce the new verification aids and help improving performance of already deployed tools
Develop new and improve existing internal tools and workflows to maximize the efficiency of simulation verification-based activities including debug and coverage.
Working closely with other engineering and services teams within ARM to help them adopt best solutions

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