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Arm

Responsibilities include
Micro-architecture specification development and design
Verilog and SystemVerilog RTL development and debug
Writing Assertions for RTL code and proving it in Formal verification environment
Working closely with validation, and implementation teams to meet all functional requirements, performance, power and area goals
Planning, tracking, partner communication
Line managing, coaching, mentoring and managing engineers/team
Refining methodologies/process to improve efficiency/quality
Exposure to formal verification is helpful

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