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Arm

The initial role is for the Corelink Interconnect IP family, however within the team there are unique career development opportunities as it is easy to pivot and work on different Arm IPs and technologies.

 

What will I be accountable for?

As a Design Engineer, you will be responsible for one or more functional blocks of the IP while working closely with performance modelling, validation, and implementation teams to meet all functional requirements and performance, power, area (PPA) goals.

For more & updated details, hit “Apply for job”