As part of the verification team, you will be using leading-edge verification technologies and methodologies to ensure the highest quality in our products.

What will I be accountable for?

Working closely with the RTL design team to develop comprehensive block-level verification strategies for the CPU pipeline, memory system, or CPU integration sub-system.

Developing SystemVerilog/UVM testbenches for block-level functional verification

Developing detailed verification plans for the processor block/unit

Debugging and correcting functional errors in the RTL model, using simulation tools, debug tools, and programming skills, based on an in-depth understanding of the architecture and RTL design of the processor

Defining and implementing functional coverage, and enhancing the testbench to ensure coverage closure

Documenting test plans and testbench design

For more & updated details, hit “Apply for job”