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Arteris IP

Silicon-proven Network-on-Chip (NoC) interconnect IP

Do you want to contribute to the backbone of some of the world’s most popular SoCs?

In this role, you will work within the application engineering organization to support Arteris Network on Chip Interconnect and Memory Hierarchy Solutions. You will also be part of the Arteris IP initiatives to implement proper processes throughout the organization, to serve the automotive market. You will help the Arteris Safety Manager directly in his interactions with customers.

Using your good understanding of complex System-on-Chips, you will support some of the most interesting and advanced customers in the semiconductor industry.

Responsibilities:

Provide second level of support to the Field Application Engineers and customers, both in pre-sales and post-sales
Help the Safety Manager and the engineering team implement company processes suitable for development of IP that are safety critical
Help the Safety Manager to interact with customers on safety-related questions
Participate in product QA activities.
Experience Requirements / Qualifications:

MS degree or PhD
Minimum 10 years of digital design experience
Minimum 5 years of relevant experience in complex System-on-Chip architecture
Experience with quality-oriented processes such as ISO9001; knowledge of ISO26262 is a plus.
Familiarity with the ARM ecosystem: CPU, GPU, etc.
Familiarity with safety in SoC designs
Motivated to train and educate others and help them solve complex problems
Good presentation and organizational skills
You are a team player who can take initiative