中文 English

Arteris IP

As a Functional Safety Engineer at Arteris, you will contribute to the development and compilation of required ISO26262 work products, with emphasis on functional safety HW Requirements and Safety Analysis (FMEA, FMEDA, DFA). You will support the design team in the definition of appropriate safety mechanisms at both architecture and microarchitecture levels to comply with the Technical Safety Requirements. You will support also fault injection simulations and activities by providing Functional Safety Verification Plan.

Key Responsibilities:

Be the lead IP team’s Functional Safety Engineer for all safety-related semiconductor design IP products.
Define or contribute to HW Functional Safety Requirements and Technical Safety Requirements. Work with architects, designers and design verification leaders to define and implement functional safety requirements in the design.
Traceability using Jama Software, Atlassian Jira and structured documents (like Adobe Structured FrameMaker).
Creation of Safety Analyses including FMEA, FMEDA and DFA, including preparing related safety reports.
Support the IP team in selecting appropriated HW safety mechanisms for architecture and microarchitecture to comply with the HW Safety Requirements.
Compilation of the IP Safety Case and Safety Manual.
Change Management, Document Management and Configuration Management plan.
Lead the revision of the Safety Plan, Technical Safety Concept, and SEooC Assumptions.

For additional details and most recent updates, hit “Apply for job”