Synopsys
Seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow.
The candidate would be working as part of a highly experienced mixed-signal design and verification team, targeting the current and next generation high speed SERDES, such as USB4.0v2, USB4.0, PCIe4.0, Ethernet, DP2.0, HDMI2.1, and MIPI MPHY products (up to 24 Gbps).
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