Job Responsibilities

Principal Verification Engineer for Memory Controller development team.
The position is based in Austin
The role would include leading verification effort and contributing to the functional verification of the Cadence’s Memory Controller IP.
Work with the existing functional verification environment, addition of new features into the verification environment, ensuring various customer configurations are clean as part of verification regressions, supporting customers in case of any issues with using the verification environment, and functional and code coverage.
Ensure that the design is in line with the technical and quality requirements set for the team – particularly with respect to our quality Metrics.

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