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The position requires MSEE, or equivalent, with a minimum of 8-10 yrs of industry experience in designing hardware systems.

Must have excellent communication skills, both written and verbal.

Technical expertise in FPGA design for Xilinx UltraScale / UltraScale+ FPGA products is required.

Experience in FPGA design methodologies including high speed design, serial protocols and FPGA timing closure is desired.

Experience with industry standard interfaces such as PCIExpress, DDR4/5, USB, Ethernet, I2C, JTAG, High speed SerDes is required.

RTL design knowledge using Verilog is required along with experience in using RTL verification tools and flows.

Verification using with Cadence simulation products is desired.

Experience with scripting languages like Perl, TCL C-shell is strongly recommended.

Experience with PCB tools is also desired.

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