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The Sr. Principal Analog IC Designer is responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications.

Candidate’s background should include a minimum of 10 years of experience in CMOS SerDes or high-speed I/O IC design and development
Working knowledge of a set of common SerDes standards and their electrical requirements
Must have a thorough understanding of jitter and signal equalization techniques
Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; Bias and Bandgap; and Voltage Regulators

and more…

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