Cadence Design Systems

Job Description
Cadence is the leader in hardware emulation-prototyping technologies and products. Cadence’s FPGA-based prototyping system platform sets standards on the performance-utilization, the ease of use, and the congruence with emulation models.

The Sr. Principal Software Engineer will be a senior member of the Hardware Verification Research and Development team working in the field of EDA algorithmic software development for verification hardware. You will be working with your energetic team members on providing a breakthrough solution in the multi FPGA prototyping space. Challenges include the design of efficient data structure and algorithms, revisit traditional synthesis algorithms under context of multi-threading and multi-process environment, and a commitment to deliver high quality production software. As a senior engineer of our FPGA prototyping systems team, you will assist in implementing new features in the software hardware stack to support emulation and prototyping use models including debug, and ease of use features.

Qualification and Requirements

  • You must have a BS/MS/Phd in Computer Science, Electrical Engineering or Computer Engineering
  • A minimum of 10 years of solid experience as an experienced and highly productive software engineer.
  • You must have excellent C++ coding skills and experience.
  • Strong experience in the EDA software space and have delivered great QoR on an FPGA/ASIC synthesis or FPGA/ASIC verification tool chain or you are an algorithm ninja and wish to make breakthroughs in the exciting FPGA prototyping space.
  • You are confident to own the end to end software chain all the way from RTL mapping to the backend writer, and yet you can work in a high caliber team effectively.
  • You are well renowned for your excellent programming skills in C/C++ and you document your work clearly and love talking about it to your team.
  • Knowledge of Simulators and HDLs such as Verilog/VHDL and some exposure to multi-threaded/ concurrent programming are pluses.