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Cadence

Searching for an intelligent, inventive, self-starting engineer interested in developing new backend flow methodologies with the Cadence EDA toolset. You will be joining a small team of capable individuals with significant visibility throughout the entire Tensilica IP group within Cadence. You have a strong understanding of all stages of placement, CTS, routing, extraction and timing signoff, with a goal of optimizing power/performance/area of complex multi-processor Tensilica subsystems. Experience with the latest process technologies and concepts (CNOD leakage, via pillars, layer promotion, etc.) a plus.

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