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Job Description

This opportunity is for a Product Engineer in the Digital and Signoff Group (DSG) at Cadence.   The Cadence Digital and Signoff Group will offer you a dynamic environment in which you will work with innovative R&D and Customer Engagement teams to influence the development of software tools for advanced chip design platforms. As Product Engineer, you will be a source of  technical place and route expertise to Cadence customers and to R&D.

 

You are a motivated and energetic engineer with a deep understanding of ASIC design methodologies and of every stage of the RTL to GDSII flow.

You have proven hands-on experience with timing closure and PPA optimization at 16nm and below nodes.

You combine your deep understanding with strong analysis skills to debug customer problems and propose solutions, with an organized and coherent approach.

You are an excellent communicator.

 

Position Responsibilities:

Support Cadence products in the Digital and Signoff team.

Track and debug customer issues and work with R&D and release team on issue resolution.

Run design benchmarks and develop flows and solutions.

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