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Cadence

The right candidate will have a strong background on Synthesis, P&R and timing analysis fundamentals
Understands IC design with exposure to 20nm & below process nodes
Experience with EDA tools in the IC digital implementation & signoff flows
Low power analysis and hands-on 16/14nm experience a plus.
Strong Tcl/Perl programming background is a must.

Requires a BS or MS in EE with 7+ years industry related experience in design and EDA (Digital Physical Implementation)
Experience using Digitalsoftware with at least one major EDA vendor flow. Automation skills using Perl, Tcl and shell scripting essential
Strong analytical & analysis skills covering design closure is critical. Deep understanding flows, able suggest solutions to customers and provide feedback to R&D based on the QoR analysis
Proven track record and experience working in a fast paced environment
Excellent customer interaction & presentation skills

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