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Codasip

Cutting-edge processor IP based on the RISC-V open ISA

They say, “Designing microprocessors is hard, expensive, and takes years.” But does it have to? We say, “No.”

 

OUR R&D CENTERS:

Our Verification and IP Design Engineers are located in our R&D centers in Brno (Czech Republic), Villeneuve-Loubet (France), and Munich (Germany). Currently, we would like to strengthen our team in the Munich area, where our office is located not far from the city center (Theresienwiese), well connected by public transport, e.g. Munich Central Station is right around the corner. Here, you will actively cooperate with Christoph Schade – our HW Verification Engineer in Munich.

 

YOUR CORE RESPONSIBILITIES:

Verify modern RISC-V processors and their components to raise the quality of our deliverables
Create a pre-silicon verification environment, automated tests, and checkers.
Design generic solutions and process automation
Hunt for bugs by creating and using smart algorithms
Come up with and realize your own ideas on how to improve, automate or upgrade our technologies on even higher level (you will definitely get our support)

 

YOU NEED TO POSSESS THE FOLLOWING KNOWLEDGE AND SKILLS:

Passion for electronics or embedded SW
Experience with HW verification (simulation tools, formal tools, methodologies like UVM)
Knowledge of versioning tools (Git -preferred) and Linux
Software writing skills (C++ or Python preferred)
Advanced English (CEFR level B2 or higher)
Eagerness to constantly learn new things, active interest in the field, and self-education
Self-organization and reliability

 

NICE-TO-HAVES:

Desire to play a role in shaping the RISC-V world of tomorrow
Knowledge of HDL languages (Verilog, VHDL or System Verilog)
Experience in Object-Oriented Programming
DIY activities related to open source software, home automation, robotics, or similar
University degree in a related field (Microelectronics, HW design, Embedded SW, Robotics or similar)

 

WHAT WE CAN OFFER YOU:

Opportunity to work with RISC-V, computer architecture of the future
Working on innovative and unique processor optimization technology (HLS)
Participation in the whole development process from analysis to deployment
Keeping in touch with the latest trends in the industry
Opportunity to collaborate with experienced developers located in Germany, France, and the Czech Republic
Receptivity to your own innovations and ideas
Freedom and trust from Codasip DNA
Flexible working hours, including working from home occasionally
5 weeks of vacation, competitive package

 

SOME USEFUL LINKS:

https://youtu.be/wwSEIEfxysc

https://youtu.be/HWtiLo4y_is