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Developing “level-5” autonomy for both existing aircraft & eVTOL

Your Role: to design FPGA functionalities of our in-house processor designed specifically for visual SLAM pipelines and neural networks processing.

You are smart and get stuff done, and have:

  • 5+ years of experience with ASICs and/or FPGAs.
  • Experience with digital design (Verilog, SystemVerilog or VHDL).
  • Strong understanding of design flow, timing closure.
  • Familiarity with ML hardware architectures will be a plus.
  • Experience with C/C++ will be a plus.
  • Verification experience will be a plus.

Experience in aerospace engineering or avionics is not required; we will teach you everything you need to know about the constraints of safety critical systems in airworthy applications.