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RESPONSIBILITIES

Verification Engineer involved in functional verification and emulation of Inference SoC and EFLX (embedded FPGA) cores in different process nodes. Responsible for all aspects of verification and emulation including: • Integration of industry standard Verification IPs • Development and debug of UVM/SV testbenches for SoCs and TPU • Bring-up and integration verification of cores, NoC, LPDDR4X/5 memory, PCIe, USB, DFT subsystems • Development of verification testbench for silicon validation, post-silicon bring-up and checkout; Linux-based validation using C++/Python or similar • Development of coverage plans and metrics, drive coverage activities and test writing • Gate-Level Simulation/UPF simulation and debug • Emulation of SoC and/or TPU using an industry standard emulation tool • Silicon On-tester pattern generation using standard IP functional features

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Send your resumes and contact info to hr@flex-logix.com.