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Imagination Technologies

Design and implement verification strategies to achieve our design quality goals
Root-cause design issues in collaboration with other engineers
Work with engineers from other disciplines towards mutual targets
Participate in design and verification reviews and recommend improvements
Write tests in C, assembly, and SystemVerilog.
Develop test-benches, sequences, functional coverage, assertions and other UVM structures
Implement / maintain automated verification flows in languages such as Python / Shell scripts
Utilise latest techniques, tools and technologies for verification activities
Plan and schedule your own work, whilst leading more junior engineers
Help guide the direction for the team through mentoring
Contribute to team shared knowledge via open discussions and presentations

For more details, hit “apply for job”