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Infineon

Job description
In your new role, you will:
Responsible for the design and development of Digital Circuits along with the characterization of System Resource IP on Silicon.
RTL design, logic simulation and verification, RTL synthesis, STA, and ETM creation of Digital IP Blocks
Scripting various tasks for process automation
IP block constraint development, promotion to full chip-level, and interfacing with full chip assembly teams to complete the constraint integration.
Own the maintenance of legacy IP block constraints and interface with derivative chip development teams.
Behavioral model vs. schematic verification
Interfacing with cross-functional teams located around the globe at multiple Infineon locations
Characterization of IP blocks on silicon
Supervising and mentoring junior team members

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