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Infineon

In your new role, you will:

Support design and verification of mixed-signal IP utilizing the Cadence suite of tools
Work with the design team to develop analog solutions to the power management problem
Verification of mixed-signal designs utilizing the Cadence Incisive Suite of tools.
Generate VerilogAMS/SystemVerilog models and correlate results with schematic level performance.
Generate simulation workbenches and interpret the results to verify compliance with system-level requirements.
Verification of DFT plans

For additional details and most recent updates, hit “Apply for job”