As a Lead MTS Validation/Application Engineering, the candidate will be reporting to Sr. Manager of Validation and is a Full-Time position. The engineer will work on developing a validation environment across bench/ATE and system performance specification compliance using our PMIC designs. The engineer will require experience in validation/characterization of the Power Management Devices (PMIC) with processor-memory interfaces, and protocols, as well as, power efficiency and integrity concepts.


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