Maxim Integrated

Candidate will be responsible for the following:

Review and compile classification of defects identified during semiconductor manufacturing processes.
Define and maintain relevant defect matrixes for product performance, reliability and yield.
Analyse semiconductor wafer data for patterns and signatures.
Design and maintain SPC charts for excursion detection and control.
Look out for possible excursions during wafer processing.
Real Time analysis of Inline fab data on defects, tool status, commonality and RCA.
Required to be hands-on in day to day review of information, evaluation of defect monitoring strategies and understanding of defect mechanisms with the mindset of making a difference.
Perform root cause analysis for low yields using various advanced data analysis tools
Statistical and root cause analysis of sort test and parametric test data.
Should be willing to work with flexible timings which can over-lap US/global time zones.
Regular excellent interaction with remote US/global teams for projects and resolving yield issues.

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