·         BSEE, MSEE or PhD with 2-10 years of digital design experience

·         Expert in digital design flows and tools.  Fluent in VHDL/Verilog RTL level coding, test bench development/simulation, and FPGA development

·         Design experience in CMOS imaging sensor and/or System Verilog/UVM experience is a plus

·         Strong leadership skills with past experience in team management.

·         Capability to work autonomously and as part of a team, with proficient written and oral communication skills

·         Fluent in English is a must

·         DC or similar logic synthesis tool experience

For referral send CV to [email protected]