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https://twitter.com/onsemi ON Semiconductor Ireland R&D Ltd.

In this position, you will be a member of the Automotive design team at the Limerick Design Centre. This silicon engineering team is involved in the design, pre-silicon validation and layout of world class power management products. ON Semiconductor is looking to hire a Functional Safety Engineer that can also perform the role of a Senior Digital Design Engineer and, if possible, contribute to Analog Mixed Signal Verification.

The Functional Safety Engineer performs functional safety management activities according to relevant automotive standards during all project phases. The ISO26262 functional safety standard is the base for the majority of the activities. The goal of this standard is to prevent that an electrical system can cause any kind of harm to the user or the environment. This aspect is gaining importance now that the world is moving to autonomous systems like self-driving cars. The safety engineer will be part of the Digital Design Team.

 

Most important tasks and responsibilities:

  • Create functional safety awareness across departments
  • Perform hazard analysis, DFMEA, FMEDA, qualitative and quantitative fault tree analysis
  • Definition of DIA with customers (Development Interface Agreement)
  • Develop safety plans to ensure compliance with ISO26262
  • Lead and coordinate creation of functional safety documentation according ISO26262 for projects
  • Conduct reviews with product teams to ensure functional safety standards are being met throughout product development cycles
  • Collaborate with project managers, development team and customers on functional safety
  • Knowledge of mixed signal ASIC development processes
  • Qualification & validation of engineering designs

From a digital design perspective, your responsibilities will include but not limited to

  • Verilog RTL coding
  • Digital synthesis, constraint development and DFT insertion.
  • Place and route (250nm / 180nm), metal eco flow, clock tree insertion.
  • Static timing analysis. Formal equivalence.
  • ATPG

Qualifications: 8+ years or more of relevant experience.

Additional qualifications include:

  • A background in RTL level Digital IC Design using System Verilog and/or Verilog
  • Strong ASIC and/or SoC design experience
  • Good understanding of Analog Design
  • Knowledge of Analog Behavioral Modelling would be an advantage, as would ability to run and debug Top Level Mixed Signal Simulations
  • Proven track record of successful first time delivery of projects
  • A self-starter with the ability to assume leadership roles
  • Ability to work well in a diverse team environment
  • Experience with industry standard development and verification tools and methodologies

This role would suit a candidate who has relevant experience in one or more of the above areas and is looking to expand and broaden their knowledge of mixed signal ASIC design.