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Principal Engineer – Architecture

Responsibilities
Define the microarchitecture of Memory buffer chips. This involves starting with industry standard specifications, defining sub-systems (e.g. Tx/Rx/Clocking/Data-path/Power Management) implementations using analog/digital IPs.
Create specifications forsub-systems on chip (e.g. Tx/Rx/Clocking/Data-path/Power Management)
digital-analog interfaces and partitions
pin-outs, bump-outs, floor plans
functionalities to support the protocol/system level requirements
algorithm for digital calibrations of analog circuits and system level trainings/adaptations
test/debug logic etc.
Do feasibility studies including analog and digital building blocks to arrive at trade-offs and find best solutions for chip implementation
Collaborate with architecture team, other cross-functional teams and technical experts in various geographies to define and align on the chip implementation specification.
Understand and disseminate applicable standards and its relevance in a given project to the team.
Work with the system engineering team for silicon bring up and characterization.

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