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Rambus

As a logic designer, the candidate will be reporting to Senior Director Engineering and is a Full-Time position. The candidate will have the opportunity to contribute to the full life cycle of a project: from concept definition to tapeout of customer design. He/She will work with a highly experienced team where his/her ideas and efforts will make a difference.

 

Responsibilities:

Design of high-speed CMOS Digital Logic
Planning: lead digital designer roles, project managing, design block specification, system level simulation, documentation
Implementation: RTL design in Verilog, lint, clock domain crossing (CDC) analysis, top level integration, synthesis, timing analysis, timing closure, DFT-related tasks
Verification: work with verification team on planning and execution, simulation, debugging block and system level simulations, formal verification, preparation of technical reviews and product/block documentation
Flow and methodology: work in a dynamic and interdisciplinary R&D group that influences and guides Rambus’ technical direction by understanding and contributing to flow and methodology development
Interact with technical leaders of the company and senior staff in engineering, marketing, and corporate development to help ensure successful development of high value technologies and products

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