This position has responsibility for working with Rambus design teams and Foundry suppliers to select suitable Foundry process, libraries and IPs, to provide all needed support and documentation during design stage, and to own the chip tapeout process. The potential candidate should have experience in semiconductor process technology and manufacturing, Foundry technical interface, silicon design, and chip tapeout flow.

Be a technology leader to define process technology roadmap for Rambus new products by providing technology assessment to design teams.
Identify and secure technology files from the Foundry for design teams to access.
Be the champion to address technical questions from design teams.
Source the 3rd party IP for design projects and report usage quarterly.
Submit product tapeout forms and ensure all tapeout related issues are resolved to avoid tapeout delay.
Interface to Foundry engineering to get ESD & LU guidance and data.
Conduct mismatch analysis between silicon and spice simulations.

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