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Rambus

Rambus is looking for a Senior Validation Engineer to join a dynamic and multi-disciplinary team focused on the validation and productization of the Memory Buffer products.  The engineer will work in the lab to automate data collection and provide results to ensure robust system performance and specification compliance.

 

The Senior Validation Engineer will develop new and challenging test methodologies for high speed electrical interfaces. The engineer will work on the newest DRAM interface technologies in development today, validating our memory devices on the newest server systems before they are available in the market. The engineer will have the opportunity to interact with many different teams including design engineering, external customers, and marketing/application engineering. The engineer will work with processor-memory interfaces, including DDR topologies and protocols, as well as high-speed signaling, including signal integrity and power integrity concepts.

 

Responsibilities
Lab bring-up and validation of high-speed memory buffer semiconductor products.
Develop test methodologies for validating silicon designs against JEDEC and internal specifications.
Develop scripts for automating lab equipment and for analyzing lab data.
Work with silicon design teams to develop experiments, drive data collection, and present results analysis.
Provide inputs to FPGA, system, and PCB design requirements.
Support Applications Team in understanding and resolving customer issues.

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