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Siemens EDA

The candidate will be in charge of research and development of software, algorithms, and techniques for formal verification of hardware, software and safety critical systems, contributing to Calypto SLEC formal verification product line. As a generalist, for a formal verification product line, the candidate will have a broad charter of contributing to various aspects of the tool flow, to take formal verification from research to broad usage.

The candidate will report to the director of the engineering team responsible for SLEC product line, in Calypto Systems Division in Siemens EDA. The division is responsible for industry leading tools for formal verification, high level synthesis, RTL power analysis and optimizations, and FPGA and ASIC synthesis.

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