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Siemens | Mentor Graphics

Verification IP Engineer

Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen4/Gen5, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CCIX for use with Questa RTL simulation.

Questa verification IP’s help design teams find more bugs in less time than conventional simulation techniques.
You will specify, implement, test and enhance these verification components for a wide range of end user applications.
You will interact with TMEs and Field AEs or directly with customers to deploy or resolve customer issues

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